dio_tester_and_breakout
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| dio_tester_and_breakout [2019/03/12 22:02] – [Revision 2: Jan 2019] tell | dio_tester_and_breakout [2019/10/07 23:16] (current) – [Revision 2: Jan 2019] tell | ||
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| * add two tiny mounting holes. | * add two tiny mounting holes. | ||
| * add silkscreen labeling the three signals on the connectors " | * add silkscreen labeling the three signals on the connectors " | ||
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| + | This version of the board design is https:// | ||
| ====== Proposed Revision 3: Feb 2019 ====== | ====== Proposed Revision 3: Feb 2019 ====== | ||
| Line 80: | Line 82: | ||
| We might build this one, or might build a separate logic gate board. | We might build this one, or might build a separate logic gate board. | ||
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| + | One limitation of the schematic above is that while the inverted outputs can be wire-ORed and not affect the on-board status LED, wire-ORing the inputs would cause all of the LEDs to light if any input was low. A more elaborate, buffered design would allow either true or inverted output to be wire-ORed, while still giving a useful status of the input. | ||
dio_tester_and_breakout.1552442551.txt.gz · Last modified: 2019/03/12 22:02 by tell
